Anomalous degradation behavior of p-type polycrystalline silicon thin film transistors under negative gate bias stress

Anomalous device degradation behavior of p-type polycrystalline silicon thin film transistors under negative gate bias stress is observed. In the first stage, negative gate bias instability dominates, resulting in negative threshold voltage (V_th) shift while in the second stage, negative charge generation induced by hot electrons happens, giving rise to positive V_th shift.