A 0.38 mm2, 10mhz-6.6 GHz quadrature frequency synthesizer using fractional-N injection-locked technique

This paper presents an area- and power-efficient delta-sigma frequency synthesizer with a quadrature phase output using a fractional-N injection-locking technique. A digital calibration scheme is proposed to compensate for the PVT variations. Implemented in a 65nm CMOS process, this work demonstrates 10 MHz to 6.6 GHz continuous frequency coverage with quadrature output, while only occupies a small area of 0.38 mm
²
and consumes 16-26 mW depending on output frequency. The normalized phase noise achieves -135.3 dBc/Hz at 3 MHz offset, and -95.1 dBc/Hz in-band phase noise at 10 kHz offset, from a 1.7GHz carrier frequency.