A Process-Variation-Tolerant On-Chip CMOS Thermometer for Auto Temperature Compensated Self-Refresh of Low-Power Mobile DRAM

Smaller transistors mean that capacitors are charged less uniformly, which increases the self-refresh current in the DRAMs used in mobile devices. Adaptive self-refresh using an on-chip thermometer can solve this problem. We propose an on-chip CMOS thermometer specifically designed for controlling the refresh period of a DRAM. This thermometer includes a novel temperature sensor which has been implemented and integrated into an LPDDR2 chip. The LPDDR2 chip is fabricated in a 44-nm DRAM process. The sensor has a temperature sensitivity of
$-\hbox{3.2 mV}/^{\circ}\hbox{C}$
, over a range of 0
$^{\circ}\hbox{C}$
to 110
$^{\circ}\hbox{C}$
. Its resolution is 1.94
$~^{\circ}\hbox{C}$
and is only limited by the 6.2-mV step of the associated resistor ladder not by its own design. The linearity of the sensor permits one-point calibration, after which the errors in 61 sample circuits ranged between
$-\hbox{1.42 }^{\circ}\hbox{C}$
and
$+\hbox{2.66 }^{\circ}\hbox{C}$
. The sensor has an active area of 0.001725
$\hbox{mm}^{2}$
and consumes less than 0.36
$\mu\hbox{W}$
on average with a supply of 1.1 V. At its lowest operating temperature, this thermometer reduces the IDD6 current of the LPDDR2 chip by almost half.