The design optimization and variation study of segmented-channel MOSFET using HfO2 or SiO2 trench isolation

Recently, as another pathway of the bulk CMOS scaling, the segmented-channel MOSFET on corrugated substrate was demonstrated. In order to additionally improve its performance, the high-k material (HfO2) in-between the channel stripes of the corrugated substrate as well as in the shallow trench isolation region is used. In this work, the variation-aware design optimization of the SegFET for the LSTP specification is first performed, and then performance, power, variation analysis is followed. The VSTI filled with HfO2 (vs. SiO2) in the corrugated substrate and the STI filled with conventional material (SiO2) demonstrates the best performance, the lowest power consumption, and the least variation in the SegFET.