Design and PSPICE analysis of a grid connected multilevel converter with reduced number of switches

In this paper, PSPICE analysis and design of grid connected multilevel converter will be presented. This converter has all the features of H-bridge structure, while it has six semiconductor switches and drivers to produce five-level output voltage. Reduction of IGBTs and drivers decreases the converter losses and system cost. The PSPICE analysis is used to predict the spikes on the collector emitter voltages and to design the snubber circuit. The converter is implemented in the three-phase V-connected Statcom by using a digital control algorithm realized in floating point DSP TMS28335.