A deep submicron Si/sub 1-x/Ge/sub x//Si vertical PMOSFET fabricated by Ge ion implantation

We report a deep submicron vertical PMOS transistor using strained Si/sub 1-x/Ge/sub x/ channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si/sub 1-x/Ge/sub x//Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si/sub 1-x/Ge/sub x/ over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.