Low power readout circuit for 384×288 uncooled IRFPA with novel readout stage

A readout integrated circuit for 384×288 uncooled infrared focal plane array (IRFPA) is presented in this paper. To overcome the kickback to sample and hold stage with less power consumption, a novel readout stage of a Class AB op-amp with input stage in each column and sharing one cascode output stage is introduced. This IRFPA readout circuit has been designed and fabricated in 0.35um CMOS technology. The readout speed of the circuit can reach 7MHz, the dynamic range is 86.5dB and power consumption is 108mW. A 32×32 experimental chip has been verified by test results.