Radically extending the cycling endurance of Flash memory (to > 100M Cycles) by using built-in thermal annealing to self-heal the stress-induced damage | IEEE Conference Publication | IEEE Xplore

Radically extending the cycling endurance of Flash memory (to > 100M Cycles) by using built-in thermal annealing to self-heal the stress-induced damage


Abstract:

Flash memory endurance is limited by the tunnel oxide degradation after repeated P/E stressing in strong electric field. Thermal annealing should be able to repair the ox...Show More

Abstract:

Flash memory endurance is limited by the tunnel oxide degradation after repeated P/E stressing in strong electric field. Thermal annealing should be able to repair the oxide damage but such theory cannot be tested in real time since completed device cannot endure high temperature > 400°C and long baking time is impractical for real time operation. In this work, we propose and demonstrate a novel self-healing Flash, where a locally high temperature (>800°C), short time (ms) annealing is generated by a built-in heater. By modifying the word line (WL) from a single-ended to a double-ended structure, the WL can carry a current to generate Joule heating; and the proximity of the gate can readily heat the tunnel oxide of the Flash device, annealing out the damage caused by P/E cycling. We discover that a BE-SONOS charge-trapping NAND Flash device can be quickly annealed within a few milliseconds. With this novel technique, we demonstrate a record-high endurance of >100M (108) P/E cycles with excellent post-100M-cycle retention. Interestingly, the WL heater can be used to achieve faster erasing although normally FN tunneling should be temperature-independent. At the extreme temperature achieved in our heating-while-erasing experiments electron de-trapping from the charge trapping nitride, accompanying hole FN tunneling, also occurs, resulting in faster erasing. Finally, a novel design architecture for implementing the self-healing Flash memory is proposed.
Date of Conference: 10-13 December 2012
Date Added to IEEE Xplore: 14 March 2013
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Conference Location: San Francisco, CA, USA

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