Embedded current amplifier compensation for large-capacitive-load low-power two-stage amplifier

An embedded current amplifier compensation (ECAC) for large-capacitive-load low-power two-stage amplifier is presented in this paper with detailed theoretical analysis. With the embedded current amplifier in the first stage, the non-dominant pole determined by the load capacitor is pushed to higher frequencies while the GBW reduction is avoided, hence the capacity of driving capacitive load is improved. The size of compensation capacitor is also reduced significantly to save the overall chip area. Furthermore, the system offset is minimized due to the good symmetry of the first stage. The proposed circuit is designed and simulated in 0.13μm standard CMOS process. Simulation results show that the ECAC amplifier, driving an 800pF capacitive load, achieves a GBW of 4.2MHz while dissipating 200μW power with a compensation capacitor of only 1.5pF.