Developing application-specific multiprocessor platforms on FPGAs

The capacity of FPGA devices has reached the 1-million-LUT level, which provides space to accommodate a complete Multiprocessor System-on-Chip on the programmable device. In this work we propose a design flow to create application-specific computation architecture based on the application entry in OpenCL. The application-specific system is based on a distributed memory hierarchy in which each processor is equipped with its own local memories for data and instructions. The multiple kernels in an application are mapped to individual processors to achieve the processing parallelism. In order to efficiently use the limited resource on FPGA devices, the sizes of local data and instruction memories are determined by analyzing the application source code. Compared with the traditional shared memory architectures, the application-specific platform is capable of reducing the resource requirement, providing more processing parallelism, and achieving higher performance.