An indigenous, customized, multi key and multimode cryptographic engine in FPGA

In this paper, a cryptographic processor is designed by implementing Advanced Encryption Standard (AES) as the algorithm for encryption/decryption in Field Programmable Gate Arrays (FPGAs) which will ensure the secure transmission of the Ethernet data. The proposed processor has the ability to encrypt/decrypt in three different modes i.e. OFB, CFB and CTR. Moreover the ultimate security is guaranteed by providing the capability to use three different key lengths i.e. 128 bits, 192 bits and 256 bits. The processor is indigenous and can be reconfigurable according to user requirements.