Recent trends in yield management system

Failure analysis plays a very important role in the early introduction and fast yield improvement of new generation LSIs. Novel failure analysis technologies have been developed including an expert-system-based memory cell failure cause identification system, MEMOFANEX. These predicted causes are statistically related to the particle or pattern defects monitored at each wafer processing step using the software, MEMOLINK, which can lead to a very effective suggestion of which processing step accounts for the low yield problem. In addition, a novel technology named MEMOFAN has successfully isolated many peripheral circuitry failure locations. For logic LSIs a technology is developed to trace LSI's fault path back to the location of the defect using an electron beam voltage image. With this technique, about 800 logic LSI's have been successfully analyzed, resulting in successful debugging and yield improvement. This paper first makes brief reviews of enhancement technologies, then reviews the recent trends in yield management systems, and finally reports on our systems, putting an emphasis on failure analysis technologies.