Towards high performance and usability programming model for heterogeneous HPC platforms

Latest High Performance Computing (HPC) platforms are built with heterogeneous chips such as multicore microprocessors and multicore GPUs (Graphic Processing units), thus they are commonly called as Heterogeneous High Performance Computing (HPC) platforms. Various programming models have been developed and proposed for heterogeneous platforms. However, their wide adoption in the user community is predicted to be limited, because of low performance, low usability due to revealing architectural details in the program which burdens the programmers, and most importantly the limited SIMD execution model which relies on the GPU for most of the computations in the program which can limit the performance. Thus a more general programming model beyond SIMD which is easy to use and leads to high performance needs to be developed. In this paper, we propose methods to achieve this goal by considering all types of parallelism according to Flynn's classification (SIMD, MIMD, MISD). Our proposed methods incorporate these parallelisms in the existing high usability programming models and can lead to significant performance improvements.