RF NMOS switch, front end, up converted mixer, LC-VCO co-design in a SoC-based sensor chip in 0.13μm CMOS

This paper addressed the problem of 5GHz double sideband building blocks design in a SoC-based sensor chip for physiological signal detection, including the most critical components-RF switch, front end, up-converted mixer and voltage control oscillator (VCO). Covering up to 20GHz bandwidth, the RF NMOS switch with impedance transformation networks (ITNs) obtains low insertion loss (IL), low I/O reflection coefficient and improved linearity by virtue of positive drain bias. The front-end is characterized by a low noise amplifier (LNA) as well as a down-conversion mixer. With the employment of noise cancellation the front-end achieves broadband matching and low noise. By investigating distortion cancellation, the up-converted mixer obtains broadband high linearity. The VCO is of LC complementary version, from which the secondary effects have been found to release phase noise without more power consumption. The RF switch exhibits worst -14dB reflection coefficient from DC to 20GHz with insertion loss better than -1.35dB. T/R isolation is higher than 30dB while the 1dB desensitization point is better than 18.8dBm even with Si-based substrate. The front-end obtain -10dB input matching over desired band with conversion gain larger than 20dB. The minimum double sideband noise figure (NF) and IIP3 is 7.9dB, 8.58dBm, respectively. The up-converted mixer attains conversion loss better than 5dB with in-band IIP3 ranged from 21.28dBm to 34.86dBm, and the noise figure is less than 8.2dB. The VCO shows the phase noise better than -122dBc at 1MHz offset., and the turning range covers the whole detection band, given that the output power is 4.7dBm. Such a co-design consumes total 39.6mW from not larger than standard 1.2V supply.