Segmented-channel Si1−xGex/Si pMOSFET for improved ION and reduced variability

Segmented-channel Si_1-xGe_x/Si pMOSFETs are fabricated using a conventional process, starting with a corrugated Si_1-xGe_x/Si substrate. As compared with control devices fabricated using the same process but starting with a non-corrugated Si_1-xGe_x/Si substrate, the segmented-channel MOSFETs show better layout efficiency (30% higher I_ON for I_OFF=10 nA per μm layout width) due to enhanced hole mobility, and dramatically reduced dependence of performance on layout width due to the geometrical regularity of the channel region.