An extremely low consumption, 53mW, 65nm CMOS transmitter for 60 GHz UWB applications

An extremely low power transmitter based on fully differential architecture is presented. The design based on the maximum energy efficiency optimization of each block, yields state of the art RF performances with a record low power consumption. The transmitter shows a maximal gain of +5 dB at 60 GHz with -3.5 dBm of output power at the 1dB compression point. The saturated output power is 0.2 dBm. The frequency span for the VCO is from 56 to 59 GHz. The total power dissipation for the transmitter is reduced to 53 mW with a bias voltage of 1.2 V.