Intrinsic junctions and their role in SCL transistors

The space-charge-limited (SCL) transistor, as described in previous publications, consists of high-low and asymmetric junctions formed by diffusing n and p type impurities into a nearly intrinsic silicon substrate. These junctions are “intrinsic” since one side of them is nearly intrinsic with an extrinsic Debye length (L_D) in the range of 10 μm on the low-doped side. Previous publications on high-low and asymmetric junctions are either Incomplete or not applicable to intrinsic junctions because they are based on the depletion and charge neutrality approximations of the bipolar theory.