Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier

In this paper we propose a method of maximizing the efficiency, defined as transducer gain G_T per power dissipation P_DC, of a CMOS 100 GHz six-stage amplifier using bias point tuning. Using this method, the optimal bias voltage was 0.75V and the efficiency was 30dB/W higher than that for a voltage of 0.9V.