Planar HTS device process using ion implantation

A planar inhibiting fabrication technique of HTS electronic devices has been developed in recent years and is summarized. A systematic study of the properties of ion inhibited HTS films is presented. The inhibition of superconductivity is carried out by the implantation of reactive ions such as Al, B, Ca, and Si into YBCO epitaxial films. The inhibited films are characterized using resistivity, susceptibility, SIMS, XRD, XPS, and SEM measurements. The results indicate that the implanted ions react strongly with oxygen, which turn the films resistive, and even insulative without altering the overall crystalline structure of the films. The effect of ion diffusion is also investigated. Ion gettering phenomenon is observed in Si implanted films. Those effects define the pattern resolution of the planar inhibiting fabrication process. The ion implantation process is applied to the fabrication of HTS single layer devices. These devices include Josephson junctions, DC SQUIDs, RF coils, and microwave waveguides. Operational step-edge junctions and DC SQUIDs with a minimum width of 2 /spl mu/m were formed and tested at 77 K. Passive devices such as low loss waveguides (1-25 GHz) and high Q resonators (33 MHz) were demonstrated. The performance of these devices, in general, is better than or at least equal to that of dry etched devices. However, the new process offers two major advantages. first, the patterned device is planar, which allows a multilayer device to be built, and second, there is little or no chemical contamination of the patterned devices. To demonstrate the viability of this technique for the fabrication of multilayer devices, simple YBCO/STO/YBCO tri-layer structures (such as crossover and a parallel-plate capacitor), with two implantations were fabricated.