Dynamic response degradation of aged digital ICs

This paper summarizes the learning from analysis of the dynamic electrical behavior of a large quantity of TTL and CMOS Integrated Circuits. In particular, the results presented here are based on the measurement of gate propagation delays, and how they compare to the manufacturer's original specifications. The sample of devices was part of a Taylor MOD III system for industrial control on a manufacturing facility. They have been under uninterrupted 24×7 operation for over 30 years. The main observation of this work is that most samples exhibit only a small degradation in their parameters, with a clear tendency to the increment of their propagation delay, which translates into a lower operating frequency. Further work is in progress to correlate this observation to the different circuit topologies used for each of the functions performed by the ICs.