Fine pitch flip chip chip scale packaging

Flip chip packaging used to be the domain of micro processors and ASICs. Application processors were next to adopt flip chip packaging in high volume. Both types of packaging were based on solder interconnects, initially PbSn eutectic solder on organic substrates and then later Pb-free solders. In order to solve electro migration issues, micro processors adopted Cu pillars. Flip chip packages are now also adopting Cu pillars but primarily as a fine pitch solution because pillars can be formed as slender columns which are maintain their initial shape during assembly unlike solder. The invariant shape of the Cu pillars brings a number of other benefits such as increased, effective spacing between pillars and invariant pillar height which enable simpler substrate design and molded underfill. Those benefits result ultimately in a lower cost flip chip chip scale package. Cu pillars are stiffer than solder, especially eutectic solder, and are a concern when assembly on ELK die. Finite element modeling is very effective in identifying solution spaces which lead to reliable Cu pillar based flip chip packages. Development efforts of Cu pillars, their assembly and modeling will be described here.