TLM Based Approach for Architecture Exploration of Multicore Systems-on-Chip

Easy, efficient, and automated technique for rapid architectural exploration is achieved using Transaction Level Modeling (TLM) methodology. Architecture evaluation is performed in early stage of the design. An approach for TLM architecture exploration of multi-core systems is presented. Starting with a Task Precedence Graphs (TPG) as a design entry, different architectures with different number of processor cores, number of busses and task-to-processor/channel-to-bus mapping are rapidly explored. The viability and potential of the proposed approach is demonstrated.