A novel approach of cap-sharing to reduce the big loop filter capacitance in semi-digital PLL

Cap-sharing is used for the first time for the PLL operation. It results in a semi-digital PLL architecture with less power consumption, smaller chip area and hence more cost effective solution for very low bandwidth (sub hertz) PLL's. This technique is not limited to low bandwidth application and can be used with the same working principle for high bandwidth PLL's. With this technique the number of capacitors used always remains four irrespective of the number of storage cell.