A parser processor for MPEG-2 audio and AC-3 decoding

We developed a parser processor for the efficient implementation of logic intensive operations needed for the pre-processing of MPEG-2 audio and AC-3 bit streams. The proposed parser processor requires a relatively small chip area, while it can support multiple audio standards by programming. The complexity of the parser processor is below 10,000 gates and the memory requirement is about 5 kbytes including the instruction memory, internal RAM and parameter ROM. The operating speed is 25 MHz, which can accommodate the maximum bit rate of MPEG-2 Audio and AC-3. The hardware complexity and the execution speed of the developed processor are compared with those of a programmable digital signal processor based design and a dedicated hardware chip.