Device-process simulation of discrete silicon stabilitron with the stabilizing voltage of 6,5 V

The technology was proposed for fabrication of the silicon stabilitron with the stabilizing voltage of 6,5 V. There were defined substrate resistivity, phosphorus diffusion into substrate mode, ensuring the required stabilization voltage values under the conditions of room and two marginal values of temperatures (-55°C, +150°C). Comparison was made of the simulation data with the experiment results.