New current-mode pipeline A/D converter architectures

In this paper, we propose a new current-mode pipelined A/D converter architecture which can improve the speed by reducing the capacitive load seen by the output of every stage. By adjusting the reference currents, this new architecture can also reduce the power consumption. Using the new architecture, we designed a 2.7-V analog interface including a pipeline A/D converter and a voltage-to-current converter with adjustable AC ground voltage.