The design of NCO based on CORDIC algorithm and implementation in FPGA(∗)

Coordinate Rotation Digital Computer (CORDIC) based digital signal processing has become an important tool in communications, biomedical and industrial products, providing designers with significant impetus for making algorithm into architecture. In this paper, a new kind of CORDIC algorithm was presented which was based on the state machine structure and iterative operation of multilevel pipeline architecture. The algorithm has been realized in the FPGA using the multilevel pipeline architecture. At the end, by the simulation waveform and spectrum analysis results, the feasibility of the method was proved. Based on the algorithm, we also provide a digital down converter architecture using CORDIC processor to eliminate both multiplier and CORDIC scale factor.