The application of Virtual JTAG technology in FPGA design and debugging

With the increased complexity of FPGA, the process of debugging and verifying is to become the key portion of the FPGA design procedure. By concluding the applications of Virtual JTAG technology in an actual project, this paper has provided some ideas about how to use Virtual JTAG technology to do logical design and board-level debug. Facts have proved that the means based on Virtual JTAG and Tcl/Tk can quicken the schedules and improve the accuracy of debug greatly.