Control-flow error recovery using commodity multi-core architecture features

This paper presents a software-based technique to recover control-flow errors using inherent redundancy in commodity multi-core processors. The proposed recovery technique is composed of two phases of control-flow error detection and control-flow error recovery. Previous research shows that modern superscalar microprocessors already contain significant amounts of redundancy. CFEs can be tolerated by leveraging existing microprocessors redundancy. Therefore, the cost of adding extra redundancy for fault tolerance is eliminated.