A delta-sigma modulator with a phase-to-digital and digital-to-phase quantizer

A phase-based delta-sigma analog-to-digital converter (ADC) architecture with a combination voltage-controlled and digitally-controlled delay lines (VCDL-DCDL) is presented. The architecture uses this VCDL-DCDL combination as the phase-domain counterparts of an ADC-DAC in a traditional delta-sigma modulator. Simulation results of the new modulator achieve a 60.1 dB SNR, or a 9.7 bit over a 10 MHz bandwidth.