ADC limitation analysis for FPGA based digital π/4 DQPSK modem

This paper present the relationship between the performance of the analog-to-digital converter (ADC) and the digital FPGA and/or IC based π/4 DQPSK. As such, the ADC resolution and the ADC sampling rate are analyzed. As a result, ADC parameters for 20 Mb/s data rate were selected.