Improved low voltage dynamic BiCMOS logic gates using output feedthrough

Improvements over recently proposed dynamic BiCMOS gates are presented. The well-known "MOS clock feedthrough effect" is used to achieve full swing with substantially reduced low-to-high transition delay. This improved design allows the BiCMOS dynamic gate to operate down to 1.5 V supply voltage, and hence, makes it suitable for advanced deep sub-quarter-micron BiCMOS technologies with considerably scaled down power supplies.