A next generation diagnostic ATPG system using the Verilog HDL

This paper presents an approach for using the Verilog Hardware Description Language (HDL) together with artificial intelligence (AI) concepts such as genetic algorithms and neural networks in a next generation diagnostic automatic test pattern generation (ATPG) system. The test generation portion of the system is composed of four basic functional elements: optimizing test proposer, simulator, unsupervised pattern classifier and evaluator. The test proposer and the evaluator are implemented using a genetic algorithm (GA). The unsupervised pattern classifier is implemented with an adaptive resonance theory (ART) neural network. The model development portion of the system is composed of three basic functional elements: netlist generator (NG), component model library (CML) and automatic model builder (AMB). The paper addresses the use of the Verilog HDL in the netlist generator, automatic model builder, component model library and simulator functions. A circuit model development process is described which allows for the creation of the good circuit model as well as the fault models necessary as part of the ATPG system.