A low noise readout ASIC for CdTe/CdZnTe detectors

A 10-channel front-end ASIC has been designed for room temperature CdTe/CdZnTe semiconductor detectors with capacitance of few pF. Each channel consists of two stages low-noise charge amplification, a 4th order semi-Gaussian shaping amplifier and an output buffer. With a dual-cascade configuration the total charge gain can be adjusted from 125mV/fC to 500mV/fC and the peaking time of the shaper implemented with the `ICON' RC cell can be adjusted from 400ns to 16us with 8 steps. The impact of leakage current on the output baseline and input equivalent noise is studied. The first prototype chip has been fabricated in 0.35um CMOS process. The adjustment of the charge gain and the peaking time up to 16us are fully functioned. A minimum equivalent noise charge (ENC) of 250e has been measured. Some experimental results are reported in this paper.