Thickness dependence of stress-induced leakage currents in silicon oxide

The thickness dependence of high-voltage stress-induced leakage currents (SILC's) has been measured in oxides with thicknesses between 5 and 11 nm. The SILC's were shown to be composed of two components: a transient component and a DC component. Both components were due to trap-assisted tunneling processes. The transient component was caused by the tunnel charging and discharging of the stress-generated traps near the two interfaces. The DC component was caused by trap-assisted tunneling completely through the oxide. The thickness, voltage, and trap density dependences of both of these components were measured. The SILC's will affect data retention in electrically erasable programmable read-only memories (EEPROM's) and the DC component was used to estimate to fundamental limitations on oxide thicknesses.