VHDL-AMS model of RF-Interconnect system for global on-chip communication

In the context of future System on Chip (SoC) there is a need for efficient tools to explore the capabilities of future Network on Chip. In this paper we present a behavioral model of a RF-Interconnect system which can offer an alternative to classical global interconnects. The model was developed with VHDL-AMS. The simulation results are compared to electrical ones, and show good agreement. The new transmission line model takes into account the lossy mechanisms inherent to silicon technology.