A 10.4 dBm IIP3, 21 GHz LNA for K-band receiver front-end

A fully integrated 21 GHz LNA with 10.4 dBm IIP3 is presented in this paper. The LNA is composed of 2 common-source stages and fabricated through standard 0.18 um CMOS technology. By optimizing the gate-bias voltage of NMOS and interstage matching resistance, the linearity is enhanced. Measurement results show that the LNA can get 13.1 dB voltage gain, 5.9 dB NF, less than -10 dB input return loss and 10.4 dBm IIP₃ while its power dissipation is 12 mW at 1 V supply voltage. Compared to those published papers, this LNA get the highest linearity at comparative power dissipation.