Design of 2Gb/s LVDS transmitter and 3Gb/s LVDS receiver for optical communication in 0.18μm CMOS technology

Design of a high performance CMOS LVDS transceiver in optical communication application is presented. The proposed LVDS transceiver is composed of a transmitter (TX) circuit and a receiver (RX) circuit. Due to the differential transmission technique and the low voltage swing, the receiver circuit has a stable hysteresis voltage and is with high speed operation, meanwhile the transmitter circuit provides a low voltage differential signal by using a closed-loop control circuit. The simulation results show that the LVDS transceiver working stably at 3.3V power supply with maximal transmission speed of 2Gb/s. The core chip size of the circuit is 150×150mm
²
, and the dynamic power consumption is only 23mW.