FPGA accelerated partial volume interpolation

Interpolation is a basic concept in all fields of science and technology. Calculating the neighboring weights of an un interpolated data is found. This can be done effectively by partial volume interpolation, because it produces smooth changes with small changes in transformation and improves subvoxel accuracy. Partial volume interpolator consists of multipliers as its main component. In this work, partial volume interpolation unit is implemented using Wallace multiplier and Carry save adder multiplier and the performance of these multipliers are compared on the basis of synthesis report.