Property-classified hybrid verification based on CDFG

Developing the advantages of simulation and formal verification on CDFG structure, classified properties verification, a new strategy is proposed in this paper: Improving on OVL assertions and CTL descriptions, three types of properties are defined as blank PROCEDUREs in VHDL for simulation, CDFG matching, and model checking, respectively. For ITC99 benchmarks, test properties are designed and verified, and the results confirm that classified properties verifying is practice.