A single-chip, ultra high-speed FFT architecture

This paper presents a single chip ultra high-speed FFT architecture for real-time signal processing based on radix-8 algorithm. In order to meet such a data sample rate as several hundred MHz, high speed differential I/O interfaces and dedicated block-pipelined architecture are adopted. This idea is supported by a design example, operated at a frequency of 100MHz, a FFT processor based on this architecture can calculate a 512-point complex FFT in 0.625 μs.