A low-voltage low-power Frequency-to-voltage converter for VCO feedback linearization

A Frequency-to-voltage converter (FVC) for use in a system for feedback linearization of VCOs is presented. The VCO linearization is intended for use in an ADC application where high resolution, low power consumption, and low voltage operation is required. These requirements places stringent demands on the performance of the FVC. The proposed implementation of the FVC is a good fit for digital CMOS technology, and the system is tunable across PVT corners. Results from transistor level simulations using a 90 nm CMOS process are presented, showing a signal-to-noise and distortion ratio (SINAD) of 76.43 dB while consuming 77.6 µW from a 1.2 V supply.