A high throughput pipelined architecture for H.264/AVC deblocking filter

A novel pipeline architecture for H.264/AVC deblocking filter is proposed. A high-throughput implementation is derived by exploiting specific algorithmic features. Under normal operation the proposed filter engine needs 226 cycles to filter a macroblock (MB), while the operating frequency is 400MHz, the area is 19.2 Kgates in 0.18um technology and only single-port memories are used. It achieves 144 (36.4) Frames per second (Fps) for Full (Ultra)-HD frames. The proposed architecture outperforms the existing ones in terms of operating frequency (1.8x up to 4x), throughput (1.5x up to 3.8x), and Fps, while keeping the area in similar level. It is also the only one that meets the requirement of 50 Fps for Ultra-HD frames.