Lightweight DPA resistant solution on FPGA to counteract power models

Electronic cryptographic devices can be attacked by monitoring physical characteristics released from their circuits, such as power consumption and electromagnetic emanation. These techniques are known as Side Channel Attacks (SCAs). Differential Power Analysis (DPA) is one of the most effective SCAs, which can reveal the secret key from the dependency between the power consumption of the device and the processed data. This paper proposes a DPA resistant solution for FPGA implementations of the Advanced Encryption Standard (AES), combines two countermeasures, a new random inversion technique and an improved random register renaming countermeasure. This is the first time that the latter countermeasure is implemented on FPGA. The proposed solution achieves a very lightweight design in comparison to the previous countermeasures reported in the literature.