Design and simulation of the vertical pnp transistor on SOI

A vertical pnp BJTs on thin SOI is designed and characterized by using the mixed numerical two-dimensional process and device simulator (Sentaurus). The DC, frequency, and breakdown characteristics of the vertical pnp on SOI are simulated and analyzed. The peak of β is 85 at Vbe=-0.7. The maximum of the cutoff frequency f_τ for the pnp bipolar transistor on SOI attain 10.6 GHz, and the value of BVceo for the pnp bipolar transistor on SOI achieves -7.3V, respectively. The availability of performance pnp transistor should enable significantly improved bipolar circuit design.