Electrolytic solder deposit for next generation flip chip solder bumping

Current methods for the formation of pre-solder bumps for flip chip attachment use stencil printing techniques with an appropriate solder paste. The continuing trend towards increasing miniaturisation and the associated decrease in size of solder resist opening, SRO is causing production difficulties with the stencil printing process. Practical experience of production yields has shown that stencil printing will not be able to meet future requirements for solder bump pitch production below 0.15 mm for these applications. This paper describes a novel approach to replace the stencil printing process by use of an electrolytic deposition of solder. In contrast to stencil printing, use of electrolytic deposition techniques allows production of solder bumps with a pitch below 0.15 mm and with a SRO below 80 μm. Methods for production of electrolytic solder bumps based on pure tin as well as alloys of tin/copper are shown and in particular a method to control the alloy concentration of electroplated tin/copper bumps. Test results with both alloy system and also pure tin bumping are presented together with comparison of the advantages and disadvantages. This newly developed Sn/Cu plating process allow for a simultaneous plating of both sides of an IC Substrates, the C4 and the BGA side of the panels. On the C4 side the complete Sn/Cu solder ball are plated whereas on the BGA side the basis for the subsequent placemen of larger solder ball can be achieved. The general advantages of replacement of stencil printing by electrolytic deposition of solder bumps are shown and in particular the improvement of bump reliability and the potential to significantly decrease costs by yield improvement.