Digital linearity correction of a wide dynamic range current-mode image sensor

A method for linearity correction of a three-transistor wide dynamic range current-mode active pixel sensor is proposed. The pixel uses a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a liner-logarithmic response. One of the non-linearity contributions is the effect caused by the `on' resistance of the select transistor. To eliminate this effect, we apply a linearization function that can be performed in the digital domain. This paper discusses the sensor architecture, the pixel's design and its operation. Experimental results of the current response before and after linearization are presented. The pixel was implemented in the AMS CMOS 0.35μm process from Austrian Microsystem. The pixel size is 12×12 μm, with a fill factor of 37%.