Design and implementation of a high speed CMOS imaging system

In order to meet the needs of measurement of high-speed target, the timing sequence of LUPA300, an array CMOS image sensor of CYPRESS, is analyzed. The driving timing and control software is designed for the array CMOS sensor. High speed CMOS imaging system, whose hardware platform is FPGA, is emphasized. Real-time non-uniformity correction for CMOS sensor is implemented in the output stage. The experimental result shows that the system could control the CMOS sensor flexibly. The image is clear and stable. The maximum resolution of the image is 640H×480V pixels and the system can operate up to 250 frames per second in full resolution.