Temperature estimation model and applications to thermal-aware test scheduling

High temperature during system-on-chip (SoC) test often suffers from critical problems such as timing errors, decrease in reliability and even potential damage to chip under test. Thermal-aware test scheduling is an efficient method for ensuring thermal safe during test. The temperature evaluation is a significant research work during thermal-aware test scheduling. A simple and effective temperature estimation model based on numerical heat transfer theory is proposed that no more requires material physical parameters. A thermal-aware test scheduling algorithm based on genetic algorithm (GA) is also presented that evaluate temperature using the proposed temperature model. Experimental results using SoC d695 of ITC'02 benchmarks show that, with this thermal estimation model, the proposed scheme can not only achieve convergence of temperature, but also obtain optimal test application time.