Investigation of source potential impacts on drain disturb in Nanoscale Flash Memory

We investigated source potential impacts on drain disturb of NOR Flash cells and proposed a novel source-biased measurement which can separate channel leakage current disturb and band-to-band disturb. By this method we explored the origins of drain disturb of Nanoscale Flash Memory. Our results indicate that, under channel ionized secondary electron (CHISEL) injection operation, drain disturb originates from both drain side band-to-band tunneling (~0.66 V) and source-drain leakage (~0.4 V) when NOR Flash scales into 65 nm, which means to suppress drain disturb it is important to decrease source-drain leakage as well as drain junction leakage during nanoscale Flash cell design.